FD32M0P Microcontroller SDK
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Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
- m -
main() :
romtable_tests.c
MCU_AP_BASE_VALUE :
config_id.h
MCU_AP_IDR_VALUE :
config_id.h
MCU_CPU_ID_VALUE :
config_id.h
MCU_CPU_NAME :
config_id.h
MCU_CTRL_AHB_HCLK_CTRL_ALL_HF_CLK_OFF_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_AHB_HCLK_CTRL_ALL_HF_CLK_OFF_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_AHB_HCLK_CTRL_ONLY_HF_OSC_ON_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_AHB_HCLK_CTRL_ONLY_HF_OSC_ON_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_AHB_HCLK_CTRL_USE_LF_CLK_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_AHB_HCLK_CTRL_USE_LF_CLK_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_AHB_HCLK_CTRL_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_ANA_CLK_EN_HF_OSC_CLK_EN_OVRD_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_ANA_CLK_EN_HF_OSC_CLK_EN_OVRD_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_ANA_CLK_EN_HF_OSC_CLK_EN_OVRD_VAL_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_ANA_CLK_EN_HF_OSC_CLK_EN_OVRD_VAL_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_ANA_CLK_EN_HF_XO_OR_EXT_CLK_OVRD_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_ANA_CLK_EN_HF_XO_OR_EXT_CLK_OVRD_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_ANA_CLK_EN_HF_XO_OR_EXT_CLK_OVRD_VAL_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_ANA_CLK_EN_HF_XO_OR_EXT_CLK_OVRD_VAL_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_ANA_CLK_EN_PLL_CLK_EN_OVRD_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_ANA_CLK_EN_PLL_CLK_EN_OVRD_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_ANA_CLK_EN_PLL_CLK_EN_OVRD_VAL_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_ANA_CLK_EN_PLL_CLK_EN_OVRD_VAL_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_ANA_CLK_EN_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_ANA_SPARE_OUT0_SPARE_OUT_0_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_ANA_SPARE_OUT0_SPARE_OUT_0_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_ANA_SPARE_OUT0_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_ANA_SPARE_OUT1_SPARE_OUT_1_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_ANA_SPARE_OUT1_SPARE_OUT_1_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_ANA_SPARE_OUT1_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_ANA_SPARE_STS_SPARE_IN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_ANA_SPARE_STS_SPARE_IN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_ANA_SPARE_STS_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_AON_CTRL_AON_ADDR_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_AON_CTRL_AON_ADDR_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_AON_CTRL_AON_RDATA_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_AON_CTRL_AON_RDATA_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_AON_CTRL_AON_STRB_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_AON_CTRL_AON_STRB_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_AON_CTRL_AON_WDATA_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_AON_CTRL_AON_WDATA_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_AON_CTRL_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_APB_PCLK_CTRL_PCLK_DIV_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_APB_PCLK_CTRL_PCLK_DIV_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_APB_PCLK_CTRL_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_BASE :
FD32M0P.h
MCU_CTRL_BLOCK_CLK_REQ_BLOCK_IP_CLK_32MHZ_REQ_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_BLOCK_CLK_REQ_BLOCK_IP_CLK_32MHZ_REQ_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_BLOCK_CLK_REQ_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_BOOT_CFG_BOOT_SEL_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_BOOT_CFG_BOOT_SEL_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_BOOT_CFG_FW_TRIGGER_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_BOOT_CFG_FW_TRIGGER_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_BOOT_CFG_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_BOR_MODE_SEL_BOR_KEY_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_BOR_MODE_SEL_BOR_KEY_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_BOR_MODE_SEL_BOR_MODE_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_BOR_MODE_SEL_BOR_MODE_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_BOR_MODE_SEL_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_CLK_4MHZ_CTRL_CLK_4MHZ_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_CLK_4MHZ_CTRL_CLK_4MHZ_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_CLK_4MHZ_CTRL_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_CLK_CTRL_CLK_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_CLK_CTRL_CLK_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_CLK_CTRL_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_CLK_PWR_EN_HF_OSC_PWR_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_CLK_PWR_EN_HF_OSC_PWR_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_CLK_PWR_EN_HF_XO_PWR_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_CLK_PWR_EN_HF_XO_PWR_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_CLK_PWR_EN_LF_OSC_PWR_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_CLK_PWR_EN_LF_OSC_PWR_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_CLK_PWR_EN_LF_XO_PWR_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_CLK_PWR_EN_LF_XO_PWR_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_CLK_PWR_EN_PLL_PWR_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_CLK_PWR_EN_PLL_PWR_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_CLK_PWR_EN_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_DESC_MAJOR_REV_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_DESC_MAJOR_REV_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_DESC_MINOR_REV_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_DESC_MINOR_REV_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_DESC_MODULE_SUBTYPE_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_DESC_MODULE_SUBTYPE_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_DESC_MODULE_TYPE_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_DESC_MODULE_TYPE_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_DESC_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_GPAMPCTL_GPAMP_CFG0_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_GPAMPCTL_GPAMP_CFG0_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_GPAMPCTL_GPAMP_CFG1_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_GPAMPCTL_GPAMP_CFG1_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_GPAMPCTL_GPAMP_CHOP_CLK_FREQ_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_GPAMPCTL_GPAMP_CHOP_CLK_FREQ_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_GPAMPCTL_GPAMP_CHOP_CLK_MODE_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_GPAMPCTL_GPAMP_CHOP_CLK_MODE_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_GPAMPCTL_GPAMP_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_GPAMPCTL_GPAMP_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_GPAMPCTL_GPAMP_NCHNL_SEL_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_GPAMPCTL_GPAMP_NCHNL_SEL_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_GPAMPCTL_GPAMP_OUT_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_GPAMPCTL_GPAMP_OUT_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_GPAMPCTL_GPAMP_PCHNL_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_GPAMPCTL_GPAMP_PCHNL_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_GPAMPCTL_GPAMP_PWR_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_GPAMPCTL_GPAMP_PWR_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_GPAMPCTL_GPAMP_RRI_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_GPAMPCTL_GPAMP_RRI_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_GPAMPCTL_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_GPAMPSTS_GPAMP_STS0_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_GPAMPSTS_GPAMP_STS0_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_GPAMPSTS_GPAMP_STS1_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_GPAMPSTS_GPAMP_STS1_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_GPAMPSTS_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_HF_CLK_CTRL_HF_OSC_CODE_CHNG_TIME_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_HF_CLK_CTRL_HF_OSC_CODE_CHNG_TIME_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_HF_CLK_CTRL_HF_XO_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_HF_CLK_CTRL_HF_XO_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_HF_CLK_CTRL_HF_XO_OR_EXT_CHNG_TIME_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_HF_CLK_CTRL_HF_XO_OR_EXT_CHNG_TIME_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_HF_CLK_CTRL_HF_XO_OR_EXT_DIV_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_HF_CLK_CTRL_HF_XO_OR_EXT_DIV_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_HF_CLK_CTRL_USE_CLK_PLL_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_HF_CLK_CTRL_USE_CLK_PLL_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_HF_CLK_CTRL_USE_HF_OSC_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_HF_CLK_CTRL_USE_HF_OSC_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_HF_CLK_CTRL_USE_PRECISION_CLK_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_HF_CLK_CTRL_USE_PRECISION_CLK_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_HF_CLK_CTRL_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_HF_OSC_CLK_CTRL_HF_OSC_4MHZ_IN_STOP_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_HF_OSC_CLK_CTRL_HF_OSC_4MHZ_IN_STOP_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_HF_OSC_CLK_CTRL_HF_OSC_DISABLE_IN_STOP_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_HF_OSC_CLK_CTRL_HF_OSC_DISABLE_IN_STOP_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_HF_OSC_CLK_CTRL_HF_OSC_DISABLE_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_HF_OSC_CLK_CTRL_HF_OSC_DISABLE_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_HF_OSC_CLK_CTRL_HF_OSC_DIV1_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_HF_OSC_CLK_CTRL_HF_OSC_DIV1_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_HF_OSC_CLK_CTRL_HF_OSC_DIV2_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_HF_OSC_CLK_CTRL_HF_OSC_DIV2_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_HF_OSC_CLK_CTRL_HF_OSC_FREQ_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_HF_OSC_CLK_CTRL_HF_OSC_FREQ_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_HF_OSC_CLK_CTRL_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_INTR_EN_BOR_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_INTR_EN_BOR_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_INTR_EN_CLK_32MHZ_REQ_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_INTR_EN_CLK_32MHZ_REQ_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_INTR_EN_CLK_LF_MON_FAULT_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_INTR_EN_CLK_LF_MON_FAULT_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_INTR_EN_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_INTR_EVENT_BOR_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_INTR_EVENT_BOR_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_INTR_EVENT_CLK_32MHZ_REQ_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_INTR_EVENT_CLK_32MHZ_REQ_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_INTR_EVENT_CLK_LF_MON_FAULT_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_INTR_EVENT_CLK_LF_MON_FAULT_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_INTR_EVENT_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_IRQn :
FD32M0P.h
MCU_CTRL_LF_CLK_CTRL_GATE_CLOCKS_IN_STDBY_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_LF_CLK_CTRL_GATE_CLOCKS_IN_STDBY_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_LF_CLK_CTRL_LF_CLK_SEL_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_LF_CLK_CTRL_LF_CLK_SEL_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_LF_CLK_CTRL_LF_OSC_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_LF_CLK_CTRL_LF_OSC_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_LF_CLK_CTRL_LF_XO_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_LF_CLK_CTRL_LF_XO_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_LF_CLK_CTRL_LFOSC_CFG0_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_LF_CLK_CTRL_LFOSC_CFG0_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_LF_CLK_CTRL_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_MCU_SW_RST_SW_RST_LVL0_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_MCU_SW_RST_SW_RST_LVL0_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_MCU_SW_RST_SW_RST_LVL1_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_MCU_SW_RST_SW_RST_LVL1_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_MCU_SW_RST_SW_RST_LVL2_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_MCU_SW_RST_SW_RST_LVL2_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_MCU_SW_RST_SW_RST_LVL3_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_MCU_SW_RST_SW_RST_LVL3_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_MCU_SW_RST_SW_RST_LVL4_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_MCU_SW_RST_SW_RST_LVL4_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_MCU_SW_RST_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_PLL_CTRL1_PLL_BW_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_CTRL1_PLL_BW_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_CTRL1_PLL_FREQ_CHNG_TIME_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_CTRL1_PLL_FREQ_CHNG_TIME_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_CTRL1_PLL_PFD_WIDTH_CFG_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_CTRL1_PLL_PFD_WIDTH_CFG_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_CTRL1_PLL_REF_SEL_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_CTRL1_PLL_REF_SEL_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_CTRL1_PLL_VCO_FREQ_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_CTRL1_PLL_VCO_FREQ_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_CTRL1_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_PLL_CTRL2_PLL_MDIV_CLK0_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_CTRL2_PLL_MDIV_CLK0_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_CTRL2_PLL_MDIV_CLK1_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_CTRL2_PLL_MDIV_CLK1_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_CTRL2_PLL_MDIV_CLK2X_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_CTRL2_PLL_MDIV_CLK2X_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_CTRL2_PLL_PDIV_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_CTRL2_PLL_PDIV_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_CTRL2_PLL_QDIV_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_CTRL2_PLL_QDIV_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_CTRL2_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_PLL_EN_PLL_CP_ICFG_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_EN_PLL_CP_ICFG_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_EN_PLL_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_EN_PLL_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_EN_PLL_MDIV_CLK0_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_EN_PLL_MDIV_CLK0_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_EN_PLL_MDIV_CLK1_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_EN_PLL_MDIV_CLK1_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_EN_PLL_MDIV_CLK2X_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_EN_PLL_MDIV_CLK2X_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_EN_PLL_SW_CG_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_EN_PLL_SW_CG_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PLL_EN_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_PMODE_CFG_LOW_POWER_MODE_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PMODE_CFG_LOW_POWER_MODE_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PMODE_CFG_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_PROCMONCTL_PROC_MON_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PROCMONCTL_PROC_MON_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PROCMONCTL_PROC_MON_PWR_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PROCMONCTL_PROC_MON_PWR_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PROCMONCTL_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_PWR_SM_OVRD_CTL_CLK_4MHZ_OVRD_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PWR_SM_OVRD_CTL_CLK_4MHZ_OVRD_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PWR_SM_OVRD_CTL_CLK_4MHZ_OVRD_VAL_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PWR_SM_OVRD_CTL_CLK_4MHZ_OVRD_VAL_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PWR_SM_OVRD_CTL_CLK_AHB_OVRD_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PWR_SM_OVRD_CTL_CLK_AHB_OVRD_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PWR_SM_OVRD_CTL_CLK_AHB_OVRD_VAL_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PWR_SM_OVRD_CTL_CLK_AHB_OVRD_VAL_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PWR_SM_OVRD_CTL_CLK_APB_OVRD_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PWR_SM_OVRD_CTL_CLK_APB_OVRD_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PWR_SM_OVRD_CTL_CLK_APB_OVRD_VAL_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PWR_SM_OVRD_CTL_CLK_APB_OVRD_VAL_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PWR_SM_OVRD_CTL_CLK_CPU_OVRD_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PWR_SM_OVRD_CTL_CLK_CPU_OVRD_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PWR_SM_OVRD_CTL_CLK_CPU_OVRD_VAL_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PWR_SM_OVRD_CTL_CLK_CPU_OVRD_VAL_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PWR_SM_OVRD_CTL_CLK_LF_OVRD_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PWR_SM_OVRD_CTL_CLK_LF_OVRD_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PWR_SM_OVRD_CTL_CLK_LF_OVRD_VAL_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PWR_SM_OVRD_CTL_CLK_LF_OVRD_VAL_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PWR_SM_OVRD_CTL_USE_LF_CLK_SM_OVRD_EN_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PWR_SM_OVRD_CTL_USE_LF_CLK_SM_OVRD_EN_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PWR_SM_OVRD_CTL_USE_LF_CLK_SM_OVRD_VAL_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_PWR_SM_OVRD_CTL_USE_LF_CLK_SM_OVRD_VAL_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_PWR_SM_OVRD_CTL_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_REGS :
FD32M0P.h
MCU_CTRL_RST_CTRL_RST_KEY_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_RST_CTRL_RST_KEY_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_RST_CTRL_RST_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_RST_CTRL_RST_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_RST_CTRL_RST_STS_CLR_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_RST_CTRL_RST_STS_CLR_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_RST_CTRL_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_RST_STS_RST_STS_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_RST_STS_RST_STS_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_RST_STS_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_SPARE_CTRL_CFG0_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_SPARE_CTRL_CFG0_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_SPARE_CTRL_CFG1_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_SPARE_CTRL_CFG1_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_SPARE_CTRL_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_SPARE_STS_STS0_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_SPARE_STS_STS0_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_SPARE_STS_STS1_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_SPARE_STS_STS1_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_SPARE_STS_WRITE() :
MCU_CTRL_RW_API.h
MCU_CTRL_XO_CFG_STS_HF_XO_CFG0_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_XO_CFG_STS_HF_XO_CFG0_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_XO_CFG_STS_HF_XO_STS0_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_XO_CFG_STS_HF_XO_STS0_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_XO_CFG_STS_LF_XO_CFG0_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_XO_CFG_STS_LF_XO_CFG0_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_XO_CFG_STS_LF_XO_STS0_MASK :
MCU_CTRL_REGS.h
MCU_CTRL_XO_CFG_STS_LF_XO_STS0_OFS :
MCU_CTRL_REGS.h
MCU_CTRL_XO_CFG_STS_WRITE() :
MCU_CTRL_RW_API.h
MCU_DP_IDR_VALUE :
config_id.h
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1.14.0
1.14.0 1.14.0