Here is a list of all struct and union fields with links to the structures/unions they belong to:

- m -

maj_vote_err : UART_INTR_EVENT_REG_s
maj_vote_err_en : UART_INTR_EN0_REG_s
maj_vote_err_nmi_en : UART_INTR_NMI_EN0_REG_s
maj_vote_err_sw_set : UART_INTR_SW_SET_REG_s
major_rev : ADC_DESC_REG_s, COMP_DESC_REG_s, DAC_DESC_REG_s, DMA_DESC_REG_s, EVENT_FABRIC_DESC_REG_s, FLASH_DESC_REG_s, GPIO_DESC_REG_s, I2C_DESC_REG_s, MCU_CTRL_DESC_REG_s, OPAMP_DESC_REG_s, RTC_DESC_REG_s, SPI_DESC_REG_s, TIMER_DESC_REG_s, TIMER_TIMG_NUM_INPUT2_DESC_REG_s, UART_DESC_REG_s, VREF_DESC_REG_s, WATCHDOG_DESC_REG_s
majority_voting_en : uart_cfg_s
majvote_en : UART_CTRL_REG_s
MASTER_ACK_VAL : I2C_REGS_s
MASTER_CFG : I2C_REGS_s
MASTER_CLKSTRETCH_CNT : I2C_REGS_s
MASTER_CTRL : I2C_REGS_s
master_enable : DMA_CFG_2_REG_s, PL230_DMA_CFG_REG_s, PL230_DMA_STATUS_REG_s
MASTER_MON : I2C_REGS_s
MASTER_SCL_GEN : I2C_REGS_s
MASTER_STS : I2C_REGS_s
MASTER_TIMING_CONSTRAINT : I2C_REGS_s
MCU_CTRL_AHB_HCLK_CTRL_REG_s : MCU_CTRL_AHB_HCLK_CTRL_u
MCU_CTRL_ANA_CLK_EN_REG_s : MCU_CTRL_ANA_CLK_EN_u
MCU_CTRL_ANA_SPARE_OUT0_REG_s : MCU_CTRL_ANA_SPARE_OUT0_u
MCU_CTRL_ANA_SPARE_OUT1_REG_s : MCU_CTRL_ANA_SPARE_OUT1_u
MCU_CTRL_ANA_SPARE_STS_REG_s : MCU_CTRL_ANA_SPARE_STS_u
MCU_CTRL_AON_CTRL_REG_s : MCU_CTRL_AON_CTRL_u
MCU_CTRL_APB_PCLK_CTRL_REG_s : MCU_CTRL_APB_PCLK_CTRL_u
MCU_CTRL_BLOCK_CLK_REQ_REG_s : MCU_CTRL_BLOCK_CLK_REQ_u
MCU_CTRL_BOOT_CFG_REG_s : MCU_CTRL_BOOT_CFG_u
MCU_CTRL_BOR_MODE_SEL_REG_s : MCU_CTRL_BOR_MODE_SEL_u
MCU_CTRL_CLK_4MHZ_CTRL_REG_s : MCU_CTRL_CLK_4MHZ_CTRL_u
MCU_CTRL_CLK_CTRL_REG_s : MCU_CTRL_CLK_CTRL_u
MCU_CTRL_CLK_PWR_EN_REG_s : MCU_CTRL_CLK_PWR_EN_u
MCU_CTRL_DESC_REG_s : MCU_CTRL_DESC_u
MCU_CTRL_GPAMPCTL_REG_s : MCU_CTRL_GPAMPCTL_u
MCU_CTRL_GPAMPSTS_REG_s : MCU_CTRL_GPAMPSTS_u
MCU_CTRL_HF_CLK_CTRL_REG_s : MCU_CTRL_HF_CLK_CTRL_u
MCU_CTRL_HF_OSC_CLK_CTRL_REG_s : MCU_CTRL_HF_OSC_CLK_CTRL_u
MCU_CTRL_INTR_EN_REG_s : MCU_CTRL_INTR_EN_u
MCU_CTRL_INTR_EVENT_REG_s : MCU_CTRL_INTR_EVENT_u
MCU_CTRL_LF_CLK_CTRL_REG_s : MCU_CTRL_LF_CLK_CTRL_u
MCU_CTRL_MCU_SW_RST_REG_s : MCU_CTRL_MCU_SW_RST_u
MCU_CTRL_PLL_CTRL1_REG_s : MCU_CTRL_PLL_CTRL1_u
MCU_CTRL_PLL_CTRL2_REG_s : MCU_CTRL_PLL_CTRL2_u
MCU_CTRL_PLL_EN_REG_s : MCU_CTRL_PLL_EN_u
MCU_CTRL_PMODE_CFG_REG_s : MCU_CTRL_PMODE_CFG_u
MCU_CTRL_PROCMONCTL_REG_s : MCU_CTRL_PROCMONCTL_u
MCU_CTRL_PWR_SM_OVRD_CTL_REG_s : MCU_CTRL_PWR_SM_OVRD_CTL_u
MCU_CTRL_RST_CTRL_REG_s : MCU_CTRL_RST_CTRL_u
MCU_CTRL_RST_STS_REG_s : MCU_CTRL_RST_STS_u
MCU_CTRL_SPARE_CTRL_REG_s : MCU_CTRL_SPARE_CTRL_u
MCU_CTRL_SPARE_STS_REG_s : MCU_CTRL_SPARE_STS_u
MCU_CTRL_XO_CFG_STS_REG_s : MCU_CTRL_XO_CFG_STS_u
MCU_SW_RST : MCU_CTRL_REGS_s
mem : eeprom_block_t
min_bin : RTC_MIN_CTL_REG_s
MIN_CTL : RTC_REGS_s
min_lsb_bcd : RTC_MIN_CTL_REG_s
min_msb_bcd : RTC_MIN_CTL_REG_s
min_rtc_rdy : RTC_MIN_CTL_REG_s
minor_rev : ADC_DESC_REG_s, COMP_DESC_REG_s, DAC_DESC_REG_s, DMA_DESC_REG_s, EVENT_FABRIC_DESC_REG_s, FLASH_DESC_REG_s, GPIO_DESC_REG_s, I2C_DESC_REG_s, MCU_CTRL_DESC_REG_s, OPAMP_DESC_REG_s, RTC_DESC_REG_s, SPI_DESC_REG_s, TIMER_DESC_REG_s, TIMER_TIMG_NUM_INPUT2_DESC_REG_s, UART_DESC_REG_s, VREF_DESC_REG_s, WATCHDOG_DESC_REG_s
mode : spi_cfg_t, UART_CTRL_REG_s
MODE_CTRL : SPI_REGS_s
modue_subtype : COMP_DESC_REG_s, DAC_DESC_REG_s, DMA_DESC_REG_s, EVENT_FABRIC_DESC_REG_s, FLASH_DESC_REG_s, GPIO_DESC_REG_s, I2C_DESC_REG_s, OPAMP_DESC_REG_s, RTC_DESC_REG_s, TIMER_DESC_REG_s, TIMER_TIMG_NUM_INPUT2_DESC_REG_s, VREF_DESC_REG_s, WATCHDOG_DESC_REG_s
module_subtype : ADC_DESC_REG_s, MCU_CTRL_DESC_REG_s, SPI_DESC_REG_s, UART_DESC_REG_s
module_type : ADC_DESC_REG_s, COMP_DESC_REG_s, DAC_DESC_REG_s, DMA_DESC_REG_s, EVENT_FABRIC_DESC_REG_s, FLASH_DESC_REG_s, GPIO_DESC_REG_s, I2C_DESC_REG_s, MCU_CTRL_DESC_REG_s, OPAMP_DESC_REG_s, RTC_DESC_REG_s, SPI_DESC_REG_s, TIMER_DESC_REG_s, TIMER_TIMG_NUM_INPUT2_DESC_REG_s, UART_DESC_REG_s, VREF_DESC_REG_s, WATCHDOG_DESC_REG_s
mon_bin : RTC_MON_CTL_REG_s
MON_CTL : RTC_REGS_s
mon_lsb_bcd : RTC_MON_CTL_REG_s
mon_msb_bcd : RTC_MON_CTL_REG_s
mon_rtc_rdy : RTC_MON_CTL_REG_s
MOT_MOD_CNTRL : SPI_REGS_s
msb_first : spi_cfg_t, SPI_DATAFRAME_CTRL_REG_s, uart_cfg_s
mst_ackval : I2C_MASTER_ACK_VAL_REG_s
mst_addr_mode : I2C_MASTER_CFG_REG_s
mst_arblost : I2C_MASTER_STS_REG_s
mst_auto_ack_en : I2C_MASTER_CFG_REG_s
mst_burst_len : I2C_MASTER_CTRL_REG_s
mst_busbsy : I2C_MASTER_STS_REG_s
mst_clkstretch_en : I2C_MASTER_CFG_REG_s
mst_cmd_vld : I2C_MASTER_CTRL_REG_s
mst_crc_out_byte : I2C_CRC_OUT_BYTE_REG_s
mst_dir : I2C_MASTER_CTRL_REG_s
mst_enable : I2C_MASTER_CFG_REG_s
mst_fsm_busy : I2C_MASTER_STS_REG_s
mst_idle : I2C_MASTER_STS_REG_s
mst_max_clkstretch_cnt : i2c_counter_cfg_t, I2C_MASTER_CLKSTRETCH_CNT_REG_s
mst_nack : I2C_INTR_EVENT_REG_s
mst_nack_en : I2C_INTR_EN_0_REG_s
mst_nack_nmi_en : I2C_INTR_NMI_EN_0_REG_s
mst_nack_sw_set : I2C_INTR_SW_SET_0_REG_s
mst_rd_on_txempty : I2C_MASTER_CTRL_REG_s
mst_restart_setup_cnt : i2c_counter_cfg_t, I2C_MASTER_TIMING_CONSTRAINT_REG_s
mst_scl_cnt_high_val : i2c_counter_cfg_t, I2C_MASTER_SCL_GEN_REG_s
mst_scl_cnt_low_val : i2c_counter_cfg_t, I2C_MASTER_SCL_GEN_REG_s
mst_scl_start_cnt : i2c_counter_cfg_t, I2C_MASTER_TIMING_CONSTRAINT_REG_s
mst_scl_state : I2C_MASTER_MON_REG_s
mst_sda_state : I2C_MASTER_MON_REG_s
mst_sda_stop_cnt : i2c_counter_cfg_t, I2C_MASTER_TIMING_CONSTRAINT_REG_s
mst_slv_addr_cfg : I2C_MASTER_CFG_REG_s
mst_start : I2C_MASTER_CTRL_REG_s
mst_start_intr : I2C_INTR_EVENT_REG_s
mst_start_intr_en : I2C_INTR_EN_0_REG_s
mst_start_intr_nmi_en : I2C_INTR_NMI_EN_0_REG_s
mst_start_intr_sw_set : I2C_INTR_SW_SET_0_REG_s
mst_state : I2C_FSM_STATUS_REG_s
mst_stop : I2C_MASTER_CTRL_REG_s
mst_stop_intr : I2C_INTR_EVENT_REG_s
mst_stop_intr_en : I2C_INTR_EN_0_REG_s
mst_stop_intr_nmi_en : I2C_INTR_NMI_EN_0_REG_s
mst_stop_intr_sw_set : I2C_INTR_SW_SET_0_REG_s
mst_stop_start_buffer_cnt : i2c_counter_cfg_t, I2C_MASTER_TIMING_CONSTRAINT_REG_s
mst_tx_addr_ack : I2C_MASTER_STS_REG_s
mst_tx_data_ack : I2C_MASTER_STS_REG_s
mst_tx_nack : I2C_MASTER_STS_REG_s
mst_word_cnt : I2C_MASTER_STS_REG_s